{"id":5916,"date":"2026-03-31T14:42:55","date_gmt":"2026-03-31T14:42:55","guid":{"rendered":"https:\/\/pickandplacemachine.com\/?p=5916"},"modified":"2026-05-19T15:39:14","modified_gmt":"2026-05-19T15:39:14","slug":"in-circuit-testing-ictelectrical-verification-of-placements","status":"publish","type":"post","link":"https:\/\/pickandplacemachine.com\/ru\/in-circuit-testing-ictelectrical-verification-of-placements\/","title":{"rendered":"In-Circuit Testing (Ict):Electrical Verification Of Placements"},"content":{"rendered":"

A board can roll out of reflow looking clean enough to impress a sales rep\u2014nice fillets, tidy outlines, polarity marks where they should be, no obvious carnage under the AOI camera\u2014and still be electrically wrong in a way that burns hours in debug because somebody loaded the wrong resistor decade, flipped a diode, or let a rail short sneak past visual inspection. It happens. A lot.<\/p>\n\n\n\n

And that\u2019s the scam.<\/p>\n\n\n\n

I frankly believe too many factories confuse \u201cnothing looked weird\u201d with \u201cthe assembly is verified.\u201d Those are not the same sentence. Not even close. A board doesn\u2019t get a free pass because the placement image looks pretty on a monitor. It has to behave on the nets, on the rails, at the component level, under measurement. That\u2019s where In-Circuit Testing earns its keep, and that\u2019s why I still treat it as one of the few quality gates that cuts through shop-floor optimism.<\/p>\n\n\n\n

The bigger manufacturing backdrop matters too, because this isn\u2019t just a nerdy test-engineering argument about fixtures and probe pins. The U.S. Census Bureau\u2019s 2024 semiconductor industry snapshot<\/a> reported that U.S. semiconductor and related device manufacturing establishments increased from 1,876 in Q1 2020 to 2,545 in Q1 2024, while equipment spending in semiconductor and other electronic component manufacturing rose from $14.4 billion in 2020 to $30.3 billion in 2022. More factories. More CAPEX. More chances to ship an electrical mistake at scale.<\/p>\n\n\n\n

Why In-Circuit Testing still matters<\/h2>\n\n\n\n

But let\u2019s not make this too abstract. In-Circuit Testing is a board-level electrical verification method used to check whether placed components and connected nets actually behave the way the schematic, layout, and BOM say they should before the board gets kicked downstream into functional test, system bring-up, rework, or\u2014worst case\u2014customer-facing failure analysis.<\/p>\n\n\n\n

Here\u2019s the ugly truth.<\/p>\n\n\n\n

A resistor can be perfectly centered and still be the wrong value. A capacitor can look harmless and still be loaded backward. A lead can wet just enough to satisfy a casual glance and still be unstable under measurement. AOI is useful. Of course it is. But AOI sees appearance. ICT sees behavior. That gap is where money disappears.<\/p>\n\n\n\n

And defect behavior is never as tidy as people want it to be. A 2024 Scientific Data<\/em> paper introducing the DsPCBSD+ PCB defect dataset<\/a> documented 20,276 annotated defects across 10,259 images in nine categories. That paper was built for machine-vision work, sure, but I read it differently: it\u2019s another reminder that defect modes sprawl. They don\u2019t line up neatly for one inspection station to heroically solve.<\/p>\n\n\n\n

\"\u041c\u0430\u0448\u0438\u043d\u044b<\/a><\/figure>\n\n\n\n

What ICT actually verifies<\/h2>\n\n\n\n

So what are we really checking? Not cosmetics. Not vibes. Electrical consequences.<\/p>\n\n\n\n

In practical PCB assembly testing, ICT goes after opens, shorts, missing parts, wrong-value passives, polarity mistakes, continuity faults, rail issues, and selected powered conditions depending on the program and fixture access. When it\u2019s done properly, it also gives you something even more valuable than the pass\/fail itself: localization. You stop asking, \u201cWhy is the unit dead?\u201d and start asking, \u201cWhy is this node wrong?\u201d<\/p>\n\n\n\n

That shift matters.<\/p>\n\n\n\n

From my experience, once a team gets serious about in-circuit test, all the lazy assumptions start cracking. The \u201capproved alternate\u201d resistor reel that slipped into production. The part library inconsistency nobody fixed because it \u201conly affected one package family.\u201d The diode orientation that looked right to a harried operator under bad lighting. The net everyone assumed was fine because the board looked textbook after reflow. ICT is rude like that. It forces the board to stop posing.<\/p>\n\n\n\n

And that\u2019s the point of \u201celectrical verification of placements.\u201d It does \u043d\u0435<\/strong> mean the component merely landed in the right coordinates. It means the placed component is the right value, on the right nodes, with the right polarity, and it behaves the way the circuit expects under actual measurement. That\u2019s real process and quality<\/a> work\u2014not inspection theater.<\/p>\n\n\n\n

How in-circuit testing works on a production line<\/h2>\n\n\n\n

Usually, the machinery is straightforward even if the implementation isn\u2019t: a bed-of-nails fixture\u2014or some variation of a dedicated probing setup\u2014lands spring-loaded pins on defined test pads or accessible nodes, then the tester runs through programmed checks for continuity, resistance, capacitance, isolation, diode response, shorts, and sometimes limited powered tests to decide whether the assembly is electrically sound or hiding a defect behind a very respectable exterior.<\/p>\n\n\n\n

It sounds clean. Usually.<\/p>\n\n\n\n

Because the ugly part shows up upstream. Test access. Guarding strategy. Probe density. Pad survivability. Layout compromises. The fixture itself is never the whole story. If DFT gets treated like an afterthought, if the layout team prioritizes routing purity over access, if dense double-sided populations and shield cans squeeze out probeable nodes, then the ICT program becomes a half-blind interrogator.<\/p>\n\n\n\n

I\u2019ve seen that movie.<\/p>\n\n\n\n

That\u2019s why I\u2019d never treat ICT as a late bolt-on after equipment selection is done. It needs to sit inside broader \u0420\u0435\u0448\u0435\u043d\u0438\u044f \u0434\u043b\u044f \u043b\u0438\u043d\u0438\u0439 SMT \u043f\u043e\u0434 \u043a\u043b\u044e\u0447<\/a> planning, not get stapled on after placement strategy, reflow profile work, and inspection decisions are already politically locked. And yes, that includes boring stuff\u2014fixture maintenance, pin wear, contamination control, limit tuning, false-call analysis. Boring stuff kills yield.<\/p>\n\n\n\n

\"\u041c\u0430\u0448\u0438\u043d\u044b<\/a><\/figure>\n\n\n\n

ICT vs AOI, SPI, and functional test<\/h2>\n\n\n\n

People keep asking the wrong question. \u201cICT vs functional test?\u201d No. That\u2019s too binary. Manufacturing doesn\u2019t work like a debate club.<\/p>\n\n\n\n

Here\u2019s how I see it: SPI catches print nonsense before the board is loaded, AOI catches visible assembly mistakes, ICT catches electrical lies, and functional test catches product-level behavior under power, firmware, interfaces, and load. Stack them properly and the line gets smarter. Rip one out and the next station inherits the mess.<\/p>\n\n\n\n

\u041c\u0435\u0442\u043e\u0434<\/th>Main purpose<\/th>What it catches well<\/th>What it misses or handles poorly<\/th>Typical line position<\/th><\/tr><\/thead>
SPI<\/td>Verify solder paste deposit quality<\/td>Paste volume, height, offset, area issues<\/td>Wrong component values, post-placement electrical faults<\/td>After printing<\/td><\/tr>
AOI<\/td>Inspect visible assembly results<\/td>Missing parts, polarity marks, skew, tombstones, visible bridges<\/td>Electrical correctness of a visually acceptable board<\/td>After placement or reflow<\/td><\/tr>
ICT \/ In-Circuit Test<\/td>Electrically verify placements and nets<\/td>Opens, shorts, wrong values, polarity errors, continuity, rail checks<\/td>System-level behavior, inaccessible nodes, firmware issues<\/td>After assembly<\/td><\/tr>
Functional Test<\/td>Confirm product behavior in operation<\/td>Power-up behavior, interfaces, firmware response, real-world operation<\/td>Fast localization of board-level component errors<\/td>End-of-line<\/td><\/tr><\/tbody><\/table><\/figure>\n\n\n\n

I frankly believe AOI gets oversold because it\u2019s photogenic. Screenshots are easy. Electrical truth isn\u2019t. AOI can tell you a component appears present and aligned; it can\u2019t always tell you whether the 4.7 k\u03a9 you needed became a 47 k\u03a9 because somebody fat-fingered a reel change at 2:10 a.m. That\u2019s not a visual problem. That\u2019s an electrical problem.<\/p>\n\n\n\n

Functional test, meanwhile, is invaluable\u2014but it\u2019s a lousy place to discover a simple board-level defect you could\u2019ve isolated much earlier. Once a failure reaches end-of-line, you\u2019re not just testing anymore. You\u2019re doing detective work.<\/p>\n\n\n\n

Where ICT fits best in modern SMT manufacturing<\/h2>\n\n\n\n

Yet ICT isn\u2019t equally attractive on every line, and pretending otherwise is just brochure talk. On stable products, repeat builds, decent pad access, and meaningful volumes, the fixture cost is usually justified because cycle time stays short, debug gets sharper, and fault isolation stops eating labor. On chaotic high-mix, low-volume NPI builds, the math gets rougher\u2014fast.<\/p>\n\n\n\n

Still, here\u2019s what I\u2019ve learned: \u201crougher economics\u201d often becomes cover for sloppy discipline. Teams tell themselves they\u2019ll just lean on AOI, flying probe, and end-of-line test until volumes justify a dedicated fixture. Sometimes that works. Sometimes it quietly breeds a rework culture where everyone accepts too much mystery as normal.<\/p>\n\n\n\n

Bad habit.<\/p>\n\n\n\n

And the cost of electrical escapes in the real world is not theoretical. The NHTSA recall report 24V-915<\/a> states that PACCAR recalled 220,972 Peterbilt and Kenworth vehicles in December 2024 because electrical noise and low signal strength could affect Bendix EC80 control units. In another case, Reuters reported<\/a> in September 2024 that BYD was recalling nearly 97,000 EVs over a steering control unit manufacturing fault that posed fire risk. No, I\u2019m not claiming a missing ICT step caused either case. I\u2019m saying the market is merciless when electrical faults get loose.<\/p>\n\n\n\n

That part scales.<\/p>\n\n\n\n

\"\u041c\u0430\u0448\u0438\u043d\u044b<\/a><\/figure>\n\n\n\n

Common implementation mistakes and how to avoid them<\/h2>\n\n\n\n

But most ICT failures I see aren\u2019t failures of the concept. They\u2019re failures of execution. The first mistake is timing\u2014teams wait too long, then realize access is poor and coverage is compromised. The second mistake is over-trusting AOI, as if a clean image settles electrical questions. The third mistake is underestimating line-maintenance reality: bent pins, dirty pads, weak guarding, unstable limits, drifting contact quality, rushed debug loops.<\/p>\n\n\n\n

That last one hurts.<\/p>\n\n\n\n

From my experience, once a tester starts throwing noisy false calls, the whole station\u2019s credibility erodes. Operators stop trusting it. Engineers start \u201cinterpreting\u201d results instead of respecting them. Meetings multiply. Root-cause gets fuzzy. Somebody eventually says ICT itself is unreliable, when the real problem is that nobody maintained the fixture, reviewed the limits, or protected the test access in the first place.<\/p>\n\n\n\n

That\u2019s why I\u2019d ask for evidence, not promises. Real \u0434\u0435\u043b\u0430 \u043a\u043b\u0438\u0435\u043d\u0442\u043e\u0432<\/a> matter more than polished sales copy, and solid \u043e\u0431\u0443\u0447\u0435\u043d\u0438\u0435 \u0438 \u043f\u043e\u0441\u043b\u0435\u043f\u0440\u043e\u0434\u0430\u0436\u043d\u043e\u0435 \u043e\u0431\u0441\u043b\u0443\u0436\u0438\u0432\u0430\u043d\u0438\u0435<\/a> matters more than some inflated coverage number on a slide deck. A tester is only as trustworthy as the people and processes wrapped around it.<\/p>\n\n\n\n

\u0412\u043e\u043f\u0440\u043e\u0441\u044b \u0438 \u043e\u0442\u0432\u0435\u0442\u044b<\/h2>\n\n\n\n

What is In-Circuit Testing in PCB assembly?<\/strong><\/p>\n\n\n\n

In-Circuit Testing is a fixture-based electrical test method that probes a populated PCB to verify component values, polarity, continuity, opens, shorts, and selected net conditions before the board proceeds to higher-level functional evaluation. That makes it one of the most direct ways to confirm that placements are electrically correct, not just visually acceptable.<\/p>\n\n\n\n

It\u2019s the board-level truth serum. Harsh, but useful.<\/p>\n\n\n\n

How does in-circuit testing work?<\/strong><\/p>\n\n\n\n

In-circuit testing works by contacting defined PCB nodes through a bed-of-nails or similar fixture and then running programmed electrical measurements that check continuity, resistance, capacitance, diode behavior, isolation, and selected powered conditions against known limits. The result is a fast, repeatable pass-fail decision with location-specific diagnostic value.<\/p>\n\n\n\n

No access, no confidence. That\u2019s the short version.<\/p>\n\n\n\n

What is the difference between ICT and functional testing?<\/strong><\/p>\n\n\n\n

ICT verifies board-level electrical correctness at the component and net level, while functional testing verifies whether the assembled product performs correctly under power, firmware, interfaces, and operating conditions. The two methods are complementary because they detect different classes of failure and do so at different cost points.<\/p>\n\n\n\n

I wouldn\u2019t pit them against each other. Different jobs.<\/p>\n\n\n\n

Can ICT replace AOI?<\/strong><\/p>\n\n\n\n

ICT cannot replace AOI because it does not provide the same visibility into physical alignment, solder appearance, marking, or certain visual assembly defects, just as AOI cannot replace ICT for direct electrical verification of component values, continuity, and net integrity. The strongest manufacturing flows use both methods in sequence.<\/p>\n\n\n\n

One sees shape. One sees electrical behavior. Keep both.<\/p>\n\n\n\n

When is bed-of-nails testing the right choice?<\/strong><\/p>\n\n\n\n

Bed-of-nails testing is the right choice when product volume is high enough to justify a custom fixture, the PCB has usable test access, and the business benefits from short cycle times and repeatable board-level fault isolation. Under those conditions, it usually outperforms slower alternatives in throughput and consistency.<\/p>\n\n\n\n

If the design changes weekly, maybe not. If the product is stable, probably yes.<\/p>\n\n\n\n

If you\u2019re serious about tightening PCB assembly testing instead of just talking about quality in generic terms, start by looking at the full \u0421\u0438\u0441\u0442\u0435\u043c\u0430 \u043a\u043e\u043d\u0442\u0440\u043e\u043b\u044f SMT<\/a> and the wider process and quality<\/a> chain\u2014then \u0441\u0432\u044f\u0437\u0430\u0442\u044c\u0441\u044f \u0441 \u043a\u043e\u043c\u0430\u043d\u0434\u043e\u0439<\/a> and work backward from your board access, likely defect modes, fixture strategy, and throughput targets.<\/p>","protected":false},"excerpt":{"rendered":"

In-Circuit Testing is the discipline that confirms a placed component is not just present, but electrically correct. This article explains how ICT works, where bed-of-nails testing fits, and why ICT still matters in modern SMT lines.<\/p>","protected":false},"author":1,"featured_media":5917,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_gspb_post_css":"","footnotes":""},"categories":[837],"tags":[1235,1236,1231,1232,1234,1233],"class_list":["post-5916","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-process-quality","tag-bed-of-nails-testing","tag-functional-test","tag-ict-testing","tag-in-circuit-testing","tag-pcb-assembly-testing","tag-pcb-electrical-testing"],"blocksy_meta":[],"_links":{"self":[{"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/posts\/5916","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/comments?post=5916"}],"version-history":[{"count":2,"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/posts\/5916\/revisions"}],"predecessor-version":[{"id":6340,"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/posts\/5916\/revisions\/6340"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/media\/5917"}],"wp:attachment":[{"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/media?parent=5916"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/categories?post=5916"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/pickandplacemachine.com\/ru\/wp-json\/wp\/v2\/tags?post=5916"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}